| id | 52 |
|---|---|
| title | Trusted SILOs: Side-channel Isolated Logic Oases |
| team | Andrea Waite & ml_sudo |
| created | 2025-07-09 |
| status | completed |
Trusted SILOs: Side-channel Isolated Logic Oases
Trusted Execution Environments (TEEs) and other secure ICs like offline wallets and smart cards provide isolated enclaves to protect code and data from compromise of any system connected to them. This makes the designers of TEEs responsible for the one basket users’ increasingly valuable secrets are kept in. Adoption of cryptocurrency, AI hack tools, and increasingly invasive surveillance raises individuals’ value at risk and the chance of being a target.
We expect a boom of companies releasing new secure ASICs, and for these entrants to face an unprecedented deluge of hardware-level side-channel analysis and fault injection attacks . Current mitigation techniques exist to address these attacks, especially at the logic level, and there are research groups actively working to secure power distribution networks, but such techniques are generally reported as “proofs of concept” in academic papers, requiring a specialized security-focused analog IC design skillset to implement.
This report presents a synopsis of upcoming attacks and a menu of best-in-class, synergistic countermeasures to integrate into most ASIC design flows for non-specialist designers on tight timelines. Special attention is paid to higher level concerns like modularity, defense-in-depth, and (area-delay-power) efficiency.